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Conference Paper

Design and Verification of Supervisory Controller of High-Speed Train

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Son, HI
Department Human Perception, Cognition and Action, Max Planck Institute for Biological Cybernetics, Max Planck Society;

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Citation

Yoo, S., Lee, D., & Son, H. (2001). Design and Verification of Supervisory Controller of High-Speed Train. In IEEE International Symposium on Industrial Electronics (ISIE 2001) (pp. 1290-1295). Piscataway, NJ, USA: IEEE Operations Center.

Abstract

A high-level controller, supervisory controller, is required to monitor, control, and diagnose the low-level controllers of the high-speed train. The supervisory controller controls low-level controllers by monitoring input and output signals, events, and the high-speed train can be modeled as a discrete event system (DES). The high-speed train is modeled with automata, and the high-level control specification is defined. The supervisory controller is designed using the high-speed train model and the control specification. The designed supervisory controller is verified and evaluated with simulation using a computer-aided software engineering (CASE) tool, Object GEODE